DVB-C2 LDPC DecoderDVB-C2 (Digital Video Broadcast - Cable 2nd Generation) is an ETSI standard of the second generation for digital data transmission via cable networks. It complements the existing standards DVB-S2 and DVB-T2 for satellite and terrestrial communication and offers a capacity-approaching coding scheme. The Creonic DVB-C2 IP core integrates the forward error correction as defined by the standard (including LDPC and BCH decoder).

Applications

  • Digital Video Broadcasting
  • Further applications with highest demands on forward error correction

Standard Features the Core Supports

  • Compliant with ETSI 302 769 V1.2.1 (2011-04) (DVB-C2).
  • Support for short blocks (16200 bits) and long blocks (64800 bits).
  • Support for all modulation schemes (16-QAM, 64-QAM, 256-QAM, 1024-QAM, 4096-QAM).
  • Support for all interleaving schemes of all modulation schemes.
  • Support for all LDPC and BCH codes as defined by the standard.
  • Support for decoding of L1 signalling part 2 data.

Your Benefits

DVB-S2/DVB-T2/DVB-C2

  • Soft-Decision demapper, block deinterleaver, LDPC decoder, BCH decoder, and descrambler included.
  • Based on industry-proven design for DVB-S2.
  • Low-power and low-complexity design.
  • Burst-to-burst on-the-fly configuration.
  • Design-time configuration of throughput for optimal resource utilization.
  • Faster convergence due to layered LDPC decoder architecture.
  • Early stopping criterion for iterative LDPC decoder, saving a considerable amount of energy.
  • Configurable amount of LDPC decoding iterations for trading-off throughput and error correction performance.
  • Collection of statistic information (number of modified information bits, number of iterations, decoding successful).
  • Available for ASIC and FPGAs (Xilinx, Altera).
  • Deliverable includes VHDL source code or synthesized netlist, VHDL or SystemC testbench, and bit-accurate Matlab, C or C++ simulation model.
  • The software model includes the corresponding transmitter part.

Resources

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