About Creonic


Creonic stands for highest standards in quality, state-of-the-art technology and simple integration under adherence to time limits and budgets. Our products and services comply with the highest requirements with respect to quality and performance.


CREative microelectrONICs


Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for wired, wireless, fiber, and free-space optical communications.
All relevant digital signal processing algorithms are covered, including, but not limited to, forward error correction, modulation, equalization, and demodulation. We offer the richest product portfolio in this field, covering standards like 3GPP 5G, DVB-S2X, DVB-RCS2, CCSDS, and WiFi.
The products are applicable for ASIC and FPGA technologies and comply with the highest requirements with respect to quality and performance. 

As the richest in this field, the IP core product portfolio is used by dozens of customers worldwide in satellite modems and satellites. With Creonic’s chip designs, companies from start-ups to global corporations can realize their NewSpace goals.


 


Milestones

2009

The decision to found the company is made.

2010

Registration of the trademark Creonic in the trademark register.

Birth of Creonic UG (haftungsbeschränkt) by signing the shareholder's agreement.

Award as founders of the year 2010.

2011

Change of name to Creonic GmbH.

2012

Participation in first research project (ESR Projekt, BMBF).

2013

Successful ISO 9001:2008 Certification as the only IP vendor for FEC Cores with certification.

Creonic becomes part of the Xilinx Alliance Partner Program.

2014

Participation in German Silicon Valley Accelerator.

Creonic joins the DVB Project.

Inclusion in Altera Partner Program.

Introduction of the DVB-S2X Demodulator and Decoder

2016

The Creonic team is getting bigger: time to move to larger premises.

2017

Introduction of the DVB-S2X Wideband Demodulator and Decoder

2018

Successful upgrade to ISO 9001:2015.​

2019

Establishment of our own laboratory.

2020

Creonic Joins German Center for Satellite Communications (DeSK).

10 years of Creonic.

2021

Creonic's new  DVB-GSE Encapsulator and Decapsulator IP cores are now available.

Launch of Creonic's CCSDS 231.0-B-3 LDPC Encoder and Decoder IP cores.

2022

Release of Creonic's DVB-RCS2 Multi-Carrier Receiver.

Creonic joins New Space Initiative.

2023

Introduction of Creonic's DVB-GSE Wideband Encapsulator and Decapsulator IP cores. 

New Website goes online.

Why we exist


Mankind is currently shifting from the industry age to the information age, where information is becoming one of our most important and valuable resources. We at Creonic want to be an active participant in this unique transition. We believe that reliable storage and transmission of vast amounts of digital data are the cornerstones of this new era.

Creonic strives to satisfy the need for reliability and ever increasing data rates with products of the highest quality. We help to fuel modems, data centers, satellites, and more, with the latest algorithms of communications. Our chip designs enable start-ups and global players across the globe to build the equipment of the future.

The Founders

As founders of Creonic we, Dr. Matthias Alles and Dr. Timo Lehnigk-Emden, stand for high quality and state-of-the art products. We offer years of experience in the field of simulation and implementation for ASICs and FPGAs. Our list of selected publications gives a comprehensive overview of Creonic’s achievements.

Matthias Alles, the founder of Creonic GmbH, is an accomplished professional with a background in information technology and digital circuit design. He completed his studies "with distinction" at the University of Kaiserslautern, specializing in digital circuit design and digital signal processing.

During his studies, Matthias focused on developing flexible decoder architectures, as evidenced by his theses on "A flexible IRA LDPCC Decoder Architecture for FPGAs" (2005) and "Synthesisable IP Cores for Irregular LDPC Code Decoding Based on Highly Flexible Architecture Templates" (2006).

Matthias pursued a Ph.D. at the University of Kaiserslautern from 2006 to 2010, contributing to various research and industry projects. His research primarily involved implementing standard-compliant channel decoders for LDPC codes and turbo codes, and he successfully defended his Ph.D. thesis, "Implementation Aspects of Advanced Channel Decoding," with the highest distinction.

Since 2010, Matthias has been the Managing Partner of Creonic GmbH. Under his leadership, Creonic has become a leading provider of innovative digital communications solutions and IP cores.

Matthias Alles's career highlights his expertise in digital circuit design and channel decoding, driving advancements in the field and contributing to Creonic's success.

Timo Lehnigk-Emden, the founder of Creonic GmbH, is an experienced professional with a background in electrical engineering and a focus on communications technology. He studied from 1999 to 2005 at the University of Kaiserslautern, Germany, where he specialized in Communications Engineering to deepen his knowledge in this field.

In 2004, he gained practical experience through an internship at Nokia Bell Labs (formerly Alcatal-Lucent) in Stuttgart, Germany, where he focused on fiber optic technology. In 2005, Timo completed his diploma thesis entitled "LDPC Decoding Algorithms under Quantization Effects", which further deepened his knowledge in the area of LDPC code decoding. Driven by his passion for cutting-edge technologies, Timo completed an internship at Xilinx headquarters in San Jose, California in 2010. During this internship, he gained valuable insights into high-level synthesis for FPGA through his work with AutoESL.

From 2005 to 2010, Timo worked as a research assistant in the Microelectronic Systems Design group at the University of Kaiserslautern, Germany. During this time, Timo made significant contributions to both research and industry projects, actively participating in five of each.

In 2011, Timo successfully defended his Ph.D. thesis entitled "Implementation and Simulation Aspects of Advanced Non-Binary Iterative Coding Schemes". His dissertation demonstrated his expertise in the implementation and simulation of advanced non-binary coding schemes.

Since 2010, Timo Lehnigk-Emden is the managing partner of Creonic GmbH. Under his leadership, Creonic has become a leading provider of innovative solutions in the field of digital communication.

Timo Lehnigk-Emden's career highlights his expertise in communications technology, non-binary coding schemes and microchip design. His contributions to research, practical experience and leadership have been instrumental to Creonic's success.

Commitment

Creonic’s designs, such as our IP cores, have to comply with the following rules:



SHOW CERTIFICATE

Highest Quality

Highest quality is the primary focus at Creonic. The strict adherence to coding guidelines, utmost verification of the developed circuits, and hardware emulation with FPGA platforms contribute to the quality assurance. Our quality management system is certified according to ISO 9001:2015.

Excellent Performance

During the development of our circuits, performance plays the primary role. The decision for an architecture is only made if it…

  • requires few resources,
  • offers the highest clock frequencies, and
  • consumes little energy.

Simple Handling and Extensive Documentation

Thanks to extensive documentation and easy-to-use interfaces, our products can be easily integrated into your system in no time at all – you will benefit from shorter development times and lower costs!

The Creonic Software Framework

Our primary aim is to offer our customers optimal solutions adhering to timelines and budgets. The design flow for hardware and software components, which was especially developed within the company, significantly contributes to our success. Years of experience and the know-how of our partners have been adopted by the Creonic software framework. Objectives during the development were: 

Cost

Shorter development times of IP cores and systems in order to reduce costs.

Reuse

Simple reuse of single functionalities 
(e.g., of decoder models).

Speed

Short test and 
verification times.

Innovation

High speed of innovation by means of quick adaptation to new communication standards.