DVB-RCS2 Turbo Decoder IP Core
DVB-RCS2 (Digital Video Broadcast – Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second generation for digital data transmission via satellites. It uses a new 16-state double-binary turbo decoder that significantly outperforms its dated 8-state counterpart of DVB-RCS. DVB-RCS2 is the first standard to adopt these highest performance turbo codes. New modulation schemes (8-PSK and 16-QAM) help to increase spectral efficiency even further. The outstanding error correction performance of the DVB-RCS2 turbo decoder makes it the ideal candidate for further applications where high spectral efficiency is key for lowering costs.
- Satellite communication (Interactive Services, Professional Services, TDMA)
- Nanosatellite and CubeSat devices
- Applications with the highest demands on forward error correction
- Applications with the need for a wide range of code rates and block lengths
Standard Features the Core Supports
- Compliant with ETSI 301 545-2 V1.1.1 (2012-01) (DVB-RCS2).
- Support for all turbo code block lengths and code rates as defined by the standard.
- Support for all modulation schemes (QPSK, 8-PSK, 16-QAM).
- Gains up to 4 dB compared to convolutional codes.
- Design-time configuration of throughput for optimal resource utilization.
- Low-power and low-complexity design.
- Burst-to-burst on-the-fly configuration.
- High block length and code rate granularity.
- Configurable amount of turbo decoder iterations for trading-off throughput and error correction performance.
- Legacy DVB-RCS support on request.
- Allows for turbo synchronization to further improve error correction performance.
- Available for ASIC and FPGAs (Xilinx, Intel, Microchip).
- Deliverable includes VHDL source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model.
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