DVB-S2X Wideband BCH and LDPC Decoder

 
The Creonic DVB-S2X wideband decoder is a silicon-proven, scalable solution that allows for symbol rates of up to 500 Msymb/s on state-of-the-art FPGAs.

 DVB-S2X is the next generation satellite transmission standard which is an extended version of its well-established predecessor DVB-S2. The new specification allows for spectral efficiency gains of up to 50% by offering lower roll-off factors, higher modulations and a finer code rate granularity compared to DVB-S2.

     PRODUCT BRIEF


FLEXIBILITY


LATENCY


THROUGHPUT


ERROR CORRECTION


Applications

 


  • Satellite communication (Digital Video Broadcasting, Interactive Services, News Gathering, Professional Services)

  • Nanosatellite and CubeSat devices
  • Applications with the highest demands on forward error correction
  • Applications with the need for a wide range of code rates

Standard Features the Core Supports


  • Compliant with DVB-S2 and DVB-S2X
  • Support for decoding of BBFRAMEs
  • Support for ACM, CCM, and VCM
  • Support for short and normal frames
    (16 200 bits and 64 800 bits)
  • Support for QPSK, 8-PSK, 16-APSK,
    32-APSK, 64-APSK, 128-APSK, and
    256-APSK


      

   Your Benefits


      

  • Validated against 3rd party DVB-S2X modulators
  • Based on industry-proven design for DVB-S2
  • Decoder contains soft-decision demapper, block deinterleaver, LDPC decoder, BCH decoder, and descrambler
  • Low-power and low-complexity design
  • Frame-to-frame on-the-fly configuration
  • Design-time configuration of throughput for optimal resource utilization
  • Faster convergence due to layered LDPC decoder architecture
  • Early stopping criterion for iterative LDPC decoder, saving a considerable amount of energy
  • Configurable amount of LDPC decoding iterations for trading-off throughput and error correction performance with on-the-fly selection in ACM/VCM modes
  • Collection of statistics (error rates, average number of iterations, signal-to-noise ratio (SNR))
  • Available for ASIC and FPGAs (AMD Xilinx, Intel)
  • Deliverable includes VHDL source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model



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ISO 9001:2015
certified


Our customers can rely on consistently high quality, guaranteed by our certified quality management.