Fixed-Point AWGN Channel 


The Creonic AWGN Channel IP core is a noise generator capable of processing up to a maximum of 512 symbols in parallel. The IP core was developed with the aim of allowing the performance evaluation of a digital communication system in the presence of Additive White Gaussian Noise. The emphasis is on evaluating systems with low bit error rates. Unlike a software-based AWGN generator, which might take several hours and even days for the stated purpose, a hardware-based AWGN generator requires significantly less time. Run-time is reduced by several orders of magnitude.
 

PRODUCT BRIEF


FLEXIBILITY


LATENCY


THROUGHPUT


ERROR CORRECTION

 

Applications
​ 


  • Digital communication systems for which an AWGN channel is required

​Standard Features the Core Supports


  • Support for up to 256 symbols in
    parallel at 210 MHz
  • Support for SNR (ES/N0) in the range
    from -10 to 41dBwith steps of 0.1
    dB±~ 0.01dB
  • Synchronous design with one clock
  • Noise sequence periodically
    generated at ~264≈2x1019samples
  • Based on Box-Muller algorithm and
    Central Limit Theorem (CLT)

Your Benefits  
​

  • Design-time configuration of the number of symbols in parallel, quantization of input and output and precalculation of standard variation, for adjustment of resource utilization
  • Low-power and low-complexity design
  • AXI4-Stream interface for easy integration
  • Available for ASIC and FPGAs (AMD Xilinx, Intel)


Learn more about

Creonic MISC FEC 
and DSP Encoder / 
Decoder IP Cores

 

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