1 Gbit/s LDPC Decoder and Encoder (WiMedia UWB)

The solution from Creonic for data rates of up to 1 Gbit/s offers outstanding efficiency in terms of implementation complexity. John Porter, CTO of Cambridge Communications Systems and convinced Creonic customer, says: “The Creonic WiMedia IP core runs at over twice the speed and uses half the logic of any competing products“. Area and energy efficiency played a decisive role during the LDPC code design process. With this unified approach not only outstanding efficiency is obtained, but also excellent error correction performance, outperforming Viterbi decoders by up to 3 dB. At the same time, a throughput of hundreds of Mbit/s can be achieved even on low-cost FPGAs.







  • Ultra-wideband (UWB)

  • Wireless USB

  • Microwave Links

  • Optical Links

  • TeleCare / TeleHealth

  • Further High-throughput Applications

Features the Core Supports

  • Compliant with Multiband OFDM
    Physical Layer Specification, PHY
    Specification: Final Deliverable 1.5,
    August 11, 2009
  • Support for all LDPC codes
    (approximate channel coding rates
    1/2, 5/8, 3/4, 4/5)
  • Support for short and long blocks
    (1,200 and 1,320 bits)


  Your Benefits


  • Silicon-proven IP
  • Decodes more than 5 codeword bits per clock cycle for throughputs beyond 1 Gbit/s
  • Gains up to 3 dB compared to Viterbi decoders
  • Low-power and low-complexity design
  • Layered LDPC decoder architecture, for faster convergence behavior
  • Block-to-block on-the-fly configuration
  • Early stopping criterion for iterative LDPC decoder, saving a considerable amount of energy

  • Configurable amount of LDPC decoding iterations for trading-off throughput and error correction performance
  • Collection of statistic information (number of modified information bits, number of iterations, decoding successful)
  • LDPC encoder included
  • Available for ASIC and FPGAs (AMD Xilinx, Intel)
  • Deliverable includes VHDL source code or synthesized netlist, VHDL testbench, and Matlab, C or C++ bit-accurate simulation model

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