Creonic Today Revealed Its New CCSDS 131.2 Wideband Demodulator IP Core with Immediate Availability

Kaiserslautern, Germany, March 14, 2023 – Creonic GmbH, an industry leading IP core provider in the communications market, made its new CCSDS 131.2 Wideband Demodulator available today.

The Consultative Committee for Space Data Systems (CCSDS) is a multi-national forum for the development of communications and data systems standards for spaceflight. Creonic has been offering solutions for CCSDS standards for many years. The new demodulator IP core extends the broadest product portfolio of CCSDS LDPC and Turbo IP cores on the market. It allows customers to build a fully-fledged receiver as it complements Creonic’s proven CCSDS 131.2 SCCC Turbo Decoder IP core.

The demodulator performs all tasks of an inner receiver such as filtering, synchronization, and equalization. It allows for processing symbol rates of 500 Msymb/s and throughputs of 3 Gbit/s with 64-APSK on state-of-the-art FPGAs.

The demodulator IP core is equipped with easy-to-use AXI4-Stream and AXI4-Lite interfaces. Therefore, it perfectly fits to the Creonic CCSDS SCCC Turbo decoder.

The IP Core is available for ASIC and FPGA (Xilinx and Intel) technologies either as VHDL source code or synthesized netlist. In addition, the core comes with HDL simulation models, bit accurate Matlab, C or C++ simulation model, a software driver, and comprehensive documentation.