Creonic Shows 100 Gbps Polar Decoder in International SENDATE-TANDEM Research Project
Kaiserslautern, Germany, July 22, 2015– Creonic GmbH, a leading IP core provider for communications, announced today the release of their off-the-shelf 4G LTE and LTE-A turbo decoder IP core for base station and mobile device markets. The IP core complements the company’s comprehensive offer of forward error correction IP.
The LTE/LTE-A decoder supports 3GPP Release 8 and Release 10 specifications with data rates of up to 1 Gbit/s.All available code rates and block sizes of up to 6144 bits are supported. It was designed for LTE/LTE-A base station (BS) and mobile device (UE) applications, however the excellent error-correction-performance makes it the ideal fit for additional high-throughput applications, which require a large flexibility in code rates and block lengths.
The silicon-proven 4G LTE/LTE-A turbo decoder IP core isa low-power and low-complexity design. The decoder has a near optimal decoding performance even for very high code rates. In addition,an integrated CRC engine verifies the code block and the transport block CRC as well and stops the decoding process immediately to save energy.
The IP core is available for ASIC and FPGA (Xilinx and Altera) technologies either as source code or encrypted source code. In addition, the cores come with HDL simulation models, VHDL or SystemC testbench, bit-accurate Matlab, C or C++ simulation model and comprehensive documentation.