The Creonic DVB-S2X demodulator is a low-complexity high-performance solution that allows for symbol rates of up to 500 MSymb/s on state-of-the-art FPGAs. DVB-S2X is the next generation satellite transmission standard which is an extended version of its well-established predecessor DVB-S2. The new specification allows for spectral efficiency gains of up to 50% by offering lower roll-off factors, higher modulations and a finer code rate granularity compared to DVB-S2.
Satellite communication (Digital Video Broadcasting, Interactive Services, News Gathering, Professional Services)
Nanosatellite and CubeSat devices
Standard Features the Core Supports
Compliant with ETSI EN 302 307-1 V1.4.1 (2014-11) (DVB-S2) and ETSI EN 302 307-2 V1.1.1 (2014-10) (DVB-S2X).
Supports CCM, ACM and VCM modes.
Support for QPSK up to 256-APSK.
Support for short blocks (16200 bits) and long blocks (64800 bits).
Output of XFECFRAMEs for further processing by the Creonic DVB-S2X FEC decoder IP core.
Validated against 3rd party DVB-S2X modulators.
The demodulator contains radio interface, decimator, timing recovery, equalizer, frame acquisition, and carrier recovery.
Demodulator performs and supports spectrum inversion, DC offset correction, I/Q imbalance correction, decimation, coarse frequency estimation, timing recovery, matched filtering, downsampling, frame synchronization, PL descrambling, fine frequency correction, phase correction, automatic gain control, and PL deframing.
Low-power and low-complexity design.
Very fast synchronization due to different sets of filter coefficients for acquisition and tracking mode.
Perfectly fits to the Creonic DVB-S2X LDPC/BCH decoder.
Available for ASIC and FPGAs (Xilinx, Altera).
Deliverable includes VHDL source code or synthesized netlist, VHDL or SystemC testbench, and bit-accurate Matlab, C or C++ simulation model