DVB-S2X Wideband Modulator
The Creonic DVB-S2X wideband modulator is a low-complexity high-performance solution that allows for symbol rates of up to 500 MSymb/s (4 Gbit/s for 256-APSK) on state-of-the-art FPGAs. The IP core performs all tasks of the inner transmitter and complements the Creonic DVB-S2X wideband receiver solutions (DVB-S2X wideband demodulator and DVB-S2X LDPC/BCH wideband decoder). Additionally, the core comes with a license option for the Creonic DVB-CID modulator.
is the next generation satellite transmission standard which is an
extended version of its well-established predecessor DVB-S2. The new
specification allows for spectral efficiency gains of up to 50% by offering lower roll-off factors, higher modulations and a finer code rate granularity compared to DVB-S2.
Satellite communication (Digital Video Broadcasting, Interactive Services, News Gathering, Professional Services)
Nanosatellite and CubeSat devices
Standard Features the Core Supports
- Compliant with ETSI EN 302 307-1 V1.4.1 (2014-11) (DVB-S2) and ETSI EN 302 307-2 V1.1.1 (2014-10) (DVB-S2X)
- Supports CCM, ACM and VCM modes
- Support for QPSK up to 256-APSK
- Support for short blocks (16200 bits) and long blocks (64800 bits)
- Validated against the field-proven Creonic DVB-S2X demodulator and decoder IP cores
- Easy-to-use mode adaptation input interface
- Provides interpolated and gain-adjusted ZF basebend signal
- The modulator contains padder, BB scrambler, BCH encoder, LDPC encoder, bit interleaver, bit mapper, dummy PL frame insertion, PL signalling, pilot insertion, PL scrambler, baseband filter, interpolator, and gain adjustment
- Can be complemented with the Creonic DVB-CID modulator
- Low-power and low-complexity design.
- Available for ASIC and FPGAs (Xilinx, Intel)
- Deliverable includes VHDL source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model
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